PIC16F639-E/SS【PDF 32/74 页】IC MCU FLASH 2KX14 20SSOP

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Micrel, Inc.

KSZ8841-PMQL

October 2007

M9999-100407-1.5

Bit

Default

Read/

Write

Description

incoming IP frames at port. Packets received with incorrect IP checksum will

be discarded.

15 - 10

0x00

Reserved

MRFCE MAC Receive Flow Control Enable

When this bit is set and the KSZ8841-PMQL is in Full Duplex mode, flow

control is enabled and the KSZ8841-PMQL will acknowledge a PAUSE

frame from MAC of the controller, the outgoing packets will be pending in

the transmit buffer until the PAUSE control timer expires.

This field has no meaning in half-duplex mode and should be programmed

to 0.

When this bit is cleared, no flow control is enabled.

8 - 7

Reserved

MRB MAC Receive Broadcast

When set, the MAC receive all broadcast frames.

MRM MAC Receive Multicast

When set, the MAC receive all multicast frames (including broadcast).

MRU MAC Receive Unicast

When set, the MAC receive unicast frames that match the 48-bit Station

Address of the MAC.

MRE MAC DMA Receive Error Frame

When set, the KSZ8841-PMQL will pass the errors frames received to the

host.

Error frames include runt frames, oversized frames, CRC errors.

MRA MAC DMA Receive All

When set, the KSZ8841-PMQL receives all incoming frames, regardless of

its destination address.

DMA Receive Multicast Hash-Table Enable

Setting this bit enables the RX function to receive multicast frames that pass

the CRC Hash filtering mechanism.

MRE MAC DMA RX Enable

When the bit is set, the DMA RX block is enabled and placed in a running

state. When reset, the receive process is placed in the stopped state after

completing the reception of the current frame. The stop transmission

command is effective only when the reception process is in the running

state.

MAC DMA Transmit Start Command Register (MDTSC Offset 0x0008)

This register is written by the CPU when packets in the data buffer need to be transmitted. The following table shows

the register bit fields.

Bit

Default

Read/

Write

Description

31 - 0

0x00000000

WTSC Transmit Start Command

When written with any value, the Transmit DMA checks for frames to

be transmitted. If no descriptor is available, the transmit process returns

to suspended state. If descriptiors are available, the transmit process

starts or resumes. This bit is self-clearing.

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